LT-PRO

The Industrial Engine for Volume Scale

Stability. Power. Scale.

Platform Overview LT-PRO brings the maturity of the mobile RF industry to integrated photonics. Built on Thin-Film Lithium Tantalate, this platform is engineered for real-world deployment. It solves the critical stability and power-handling bottlenecks of legacy ferroelectrics while offering a qualified path to 150mm and 200mm volume manufacturing.

Parameter Specification Notes
Material Stack 300 nm TFLT on Insulator
Operating Wavelength O-Band, C-Band, & Visible High power handling in visible (450-900nm)
Propagation Loss < 0.2 dB/cm Ultra-low loss for complex circuits
Electro-Optic Bandwidth > 110 GHz √f loss curve suitable for THz. Supports 400G per lane.
Voltage-Length Product ~ 2.2 V·cm (O band) Comparable efficiency to TFLN
Metallization Multi-Layer Stack Includes routing metal & on-chip RF terminations
Fabrication Lead Time 18 Weeks Standard Scheduled Run

Multi-project wafers

Chip size (either 5x5mm, 10×5 mm or 20×5 mm). At least 12 copies are delivered.

Choose your delivery:

Known good die

We have off-the-shelf modulator dies available for a wide range of applications.

Dedicated project wafer

Order a dedicated 4″ wafers with 2x2cm design space.

Frequently asked questions

Everything you need to know about our solutions

An MPW is a multi-project wafer run aimed at fast prototyping and design testing. Multiple clients submit their designs to the same batch and share the wafer space, which helps reduce costs while preserving their design secrecy. In this case, the vertical stack (i.e., the dimensions of the material layers) is fixed to the optimized value.

A DPW is a dedicated project wafer run where the whole wafer space is dedicated to the client, with the liberty to [choose the vertical stack? (we decided not change the stack?)] choose the die size and total number of wafers.

We perform our TFLT and TFLN fabrication runs on 4-inch wafers.

We are also in the process of transferring our fabrication to large volume foundries supporting 6-inch and 8-inch wafers. Please contact us for details.

For TFLT and TFLN MPW runs, the standard die size is 1 cm × 0.5 cm. There is also an option to reserve space for multiple dies and unify them into a single die, subject to an additional R&D cost. The extraordinary axis is aligned along the short dimension. The modulator electrodes and modulated waveguides are aligned along the long side of the die.

For DPW runs, the die size is flexible and is defined by mutual agreement prior to the start of fabrication.

You will receive at least 12 copies of your designed chip.

We can increase the number of chips by processing a supplementary wafer at additional cost.

We typically suggest starting with 2 wafers in a dedicated run with the ability of extending the batch up to [6-8 wafers (talk to Rui)] in the R&D cleanroom. Multiple batches can be ordered with shifted delivery times.

At the moment, we are transferring our fabrication process that can handle up to 10,000 wafers per month.

You can find the GDSFactory cells on our GitHub repository:

  • TFLT: [GitHub link]
  • TFLN: [GitHub link]

Our TFLT stack supports both the O-band and C-band components with high-resistivity terminations.

Our TFLN stack has only C-band components.

The client is free to suggest their own geometries. However, the minimal fabrication dimensions of 250 nm for waveguides and 800 nm for electrodes must be satisfied. A complete documentation with details on fabrication constrains is sent after signing an NDA.

You will receive a comprehensive design manual with examples and explanations. Upon availability, our engineers can provide certain fabrication and experimental data. Design consulting services are possible upon mutual agreement prior sending a purchase order.

After contacting LXT via the [contact form link], the client receives the MPW or DPW design manual. Once the purchase order (PO) is submitted, the design space is reserved and the client can begin their design.

To help minimize design errors, LXT provides multiple reference designs and examples on its open-source GitHub page.

The client must submit their completed design by the deadline published on the website for MPW runs, or by the mutually agreed deadline for DPW runs. Within two weeks following the submission deadline, LXT engineers perform a design rule check (DRC) and notify the client if any corrections are required.

After the design passes all checks, LXT proceeds with the fabrication process.

Our typical MPW lead time is 3 months for TFLN runs and 4-5 months for TFLT after the design rule check is complete. The DPW lead time depends on the number of requested wafers and complexity of the stack. Please contact our team for details.